1. Technical Field
The present invention relates to a method of fabricating an EEPROM as a non-volatile semiconductor memory which can electrically write and erase data.
2. Related Art
When battery power is insufficient in portable mobile electronic equipments represented by a mobile phone, PDA (personal digital assistant: mobile information terminal), a notebook type computer, and a music player, they rely on a non-volatile semiconductor memory to hold data and a program. As ordinary non-volatile semiconductor memories, there are known an ultra-violet erasable EPROM (Ultra-Violet Erasable Programmable Read Only Memory) which can erase stored contents by radiating ultraviolet rays and an EEPROM (Electrically Erasable Programmable Read Only Memory) which can electrically write and erase data.
As shown in FIG. 4, the EEPROM ordinarily has such a structure such that a memory cell transistor 102 and a selection transistor 103 are formed on a Si substrate 101. The memory cell transistor 102 is composed of diffusion layers 104, 105, gate oxide films 106a, 106b, a tunnel oxide film 107, a floating gate electrode 108, and a control gate electrode 109. In the configuration, the diffusion layer 104 acts as a source and the diffusion layer 105 acts as a drain. The selection transistor 103 is composed of the diffusion layer 105, a diffusion layer 110, a gate oxide film 111, and a gate electrode 112. In the configuration, the diffusion layer 105 acts as a source and the diffusion layer 110 acts as a drain.
In fabricating the EEPROM 100 configured as described above, a problem arises in that it is difficult to miniaturize the EEPROM 100 because an allowance must be provided in design taking an alignment offset in photolithography into consideration because the tunnel oxide film 107 is formed on the diffusion layer 105. A method of solving the problem is disclosed in Japanese Patent Application Laid-Open (JP-A) No. 2001-210730.
As to formation of a tunnel oxide film to an EEPROM, JP-A No. 2001-210730 discloses to form a resist having a through hole for exposing a forming region on a semiconductor substrate through the through hole, to add conductive impurities to the substrate through the through hole, and thereafter to form the tunnel oxide film to the forming region by removing the resist. The method makes it unnecessary to adjust a tunnel oxide film forming region in alignment with a predetermined position of a diffusion layer which is previously formed on a semiconductor substrate as in a conventional method.
However, in the method of fabricating the EEPROM disclosed in JP-A No. 2001-210730, a source region of a memory cell is only formed just under the tunnel oxide film, and the source region of the memory cell is not connected to a source region of a selection transistor by a diffusion region having a high impurity concentration. Further, since the source region of the memory cell is formed after a control gate is formed, there is a possibility that it cannot be accurately formed at a desired position.